extracted from ZeroPage
.
8bit CPU 6502 .
6502 16bit addressing 한 CPU . , $0000 ~ $FFFF .
6502 13 access , 하 zero page addressing .
8bit , 8bit 00 하 addressing 하
$0000~$00FF . 해 access 했 합.
zero page 하.
한 .
The zero page instructions allow for shorter code and excution times by only feching the
second byte of the instruction and assumming a zero high address byte.
Careful use of the zero page can result in significant increase in code efficient.
(페 트 0 하 트 , 행 . 페 하 효 확한 한.)
: http://www.6502.org/datasheets/csg6500.pdf
한 ( 큰 -_-) 탑 ?
X
ZeroPage 픽 . 해, .--Leonardong
) 
Zero_page
{{|
The zero page is the memory address page at the absolute beginning of a computer's address space (the lowermost page, covered by the memory address range 0 ... page size1).
페 퓨 하 페. ( 하 페 포 0 페 -1 )
In early computers, including the PDP-8, the zero page had a special fast addressing mode, which facilitated its use for temporary storage of data and compensated for the relative shortage of CPU registers. The PDP-8 had only one register, so zero page addressing was essential.
PDP-8 포함한 퓨 페 히 .
하 하 하 CPU 하 .
Possibly unimaginable by computer users after the 1980s, the RAM of a computer used to be faster than or as fast as the CPU during the 1970s. Thus it made sense to have few registers and use the main memory as substitutes. Since each memory location within the zero page of a 16-bit address bus computer may be addressed by a single byte, it was faster, in 8-bit data bus machines, to access such a location rather than a non-zero page one.
1980 퓨 할 1970 CPU . 품 하 합했. 16트 퓨 페 한 트 페 페 하, 8트 .
For example, the MOS Technology 6502 has only six non-general purpose registers. As a result, it used the zero page extensively. Many instructions are coded differently for zero page and non-zero page addresses:
the MOS Technology 6502 6 non-general . 페 폭 하. 페 페 해 .
LDA $00 ; zero page
LDA $0000 ; non-zero page
The above two instructions both do the same thing; they load the value of $00 into the A register. However, the first instruction is only two bytes long and also faster than the second instruction. Unlike today's RISC processors, the 6502's instructions can be from one byte to three bytes long.
2 한 한; A $00 한. 하 2트 . RISC the 6502 1트 3트 하.
Zero page addressing now has mostly historical significance, since the developments in integrated circuit technology have made adding more registers to a CPU less expensive, and have made CPU operations much faster than RAM accesses. Some computer architectures still reserve the beginning of address space for other purposes, though; for instance, the Intel x86 systems reserve the first 512 words of address space for the interrupt table.
IC테크 CPU RAM 하 CPU 하 페 . 하, 퓨 키텍 히 해 페 하 한; 텔 x86 트 테 해 512 한.
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http://lxr.linux.no/source/Documentation/i386/zero-page.txt
8bit CPU 6502 .
6502 16bit addressing 한 CPU . , $0000 ~ $FFFF .
6502 13 access , 하 zero page addressing .
8bit , 8bit 00 하 addressing 하
$0000~$00FF . 해 access 했 합.
zero page 하.
second byte of the instruction and assumming a zero high address byte.
Careful use of the zero page can result in significant increase in code efficient.
(페 트 0 하 트 , 행 . 페 하 효 확한 한.)
한 ( 큰 -_-) 탑 ?
X
Zero_page{{|
The zero page is the memory address page at the absolute beginning of a computer's address space (the lowermost page, covered by the memory address range 0 ... page size1).
페 퓨 하 페. ( 하 페 포 0 페 -1 )
PDP-8 포함한 퓨 페 히 .
하 하 하 CPU 하 .
1980 퓨 할 1970 CPU . 품 하 합했. 16트 퓨 페 한 트 페 페 하, 8트 .
the MOS Technology 6502 6 non-general . 페 폭 하. 페 페 해 .
LDA $0000 ; non-zero page
The above two instructions both do the same thing; they load the value of $00 into the A register. However, the first instruction is only two bytes long and also faster than the second instruction. Unlike today's RISC processors, the 6502's instructions can be from one byte to three bytes long.
2 한 한; A $00 한. 하 2트 . RISC the 6502 1트 3트 하.
IC테크 CPU RAM 하 CPU 하 페 . 하, 퓨 키텍 히 해 페 하 한; 텔 x86 트 테 해 512 한.
|}}
