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Logic Circuit Class/Exam2006_1

2006…„ 2ํ•™ธฐ ค‘„ณ ‚ฌ

ชจ“  ฌธ œŠ” ˜–ดกœ ถœ œจ. ํ’€ด จ•ํ•จ. 120  งŒ .
  • Digital signal ด Analog signal — „ํ•ด ฐ–Š” žฅ  „€€ “ฐ‹œ˜ค.
  • ด„ˆ˜ 2˜ ณดˆ˜ จ„œ ง…ˆ, „…ˆ
  • 2„ˆ˜, 8„ˆ˜, 16„ˆ˜, 10 „ˆ˜ ™”‹คฐ”‹ค ํ•˜Š” ฌธ œ.
  • BCD 2„ˆ˜กœ ณ ณ“ฐธฐ.
  • 2„ˆ˜, 16„ˆ˜ …ˆ, ‚˜ˆ—…ˆ.(€ํ™˜—†ด)
  • ‹ ตœ†Œํ™” ํ•˜ธฐ.(ทธƒฅํ•˜Š” ฌธ œ„ ‚˜˜คณ  ฅด…ธ งตœกœ ํ•˜Š” ฐฉฒ•„ ‚˜˜ด)
  • ฐฐ   ค ํฐ ‘ ฌธ œ. ํ•˜‚˜Š” checksum ฌธ œ(ฐ•˜ก). ํ•˜‚˜Š” 3bit Full adder ˜€‚˜..? •”ํŠ adder ˜€˜ฐ™€ฐ ธฐ–ต •ˆ‚จ. „„ํ•ด„œ ํšŒกœ ทธฆฌŠ”˜€Œ. ‹ ตœ†Œํ•˜ํ•˜ณ .
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